The present invention relates to test circuits and methods, and more particularly to test circuits and methods for multilevel cell flash memory.
Many systems include test circuits for measuring voltages or currents within the system or for measuring the performance of a system by introducing predefined voltages or currents. The test circuit may impact the performance of the system being tested or may allow the introduction of electrostatic discharge to thereby damage the system being tested. The testing of multilevel memory is typically long compared to testing of single level memory.